Courses: Course 1. Introduction in VLSI testing Course 2. Boundary scan testing (1149.1, 1149.6) Course 3. Embedded Core Test Standard (1500) Course 4. Design for Testability Basics Course 5. Scan Architectures Course 6. Basic concepts of logic BIST Course 7. Logic BIST Architectures Course 8. Basic concepts of memory testing and BIST Course 9. Memory BIST Architectures Bibliography Course web site, http://etc.unitbv.ro/~tulbure/ttvf Laung-Terng Wang, Cheng-Wen Wu & Xiaoqing Wen - VLSI Test Principles and Architectures Design for Testability,http://www.elsevierdirect.com/ISBN/9780123705976/VLSI-Test-Principles-and-Architectures
Course web site, http://etc.unitbv.ro/~tulbure/ttvf Laung-Terng Wang, Cheng-Wen Wu & Xiaoqing Wen - VLSI Test Principles and Architectures Design for Testability,http://www.elsevierdirect.com/ISBN/9780123705976/VLSI-Test-Principles-and-Architectures
