SYF
Index
NAME
- SYF - Finite State Machine synthesizer.
ORIGIN
This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at ASIM/LIP6/UPMC laboratory.
E-mail support : alliance-support@asim.lip6.fr
SYNOPSIS
- syf -a|j|m|u|o|r [-CDEOPRSTV] input_name [output_name]
DESCRIPTION
syf is a Finite State Machine synthesizer. syf allows a fast generation of VHDL Data Flow description (see vbe) from a VHDL Finite State Machine description (see fsm). The input FSM specification can use an internal STACK. Both MOORE and MEALEY FSMs can be synthesized, with output registers if desired. For a MOORE FSM, a timing-optimized implementation that emulates a ROM with microsequencer is possible. A scan-path for the state registers can also be implemented.
ENVIRONMENT VARIABLES
- MBK_WORK_LIB
- indicates the path to the read/write directory for the session.
OPTIONS
- -a
Uses "Asp" as encoding algorithm.
-j
Uses "Jedi" as encoding algorithm.
-m
Uses "Mustang" as encoding algorithm.
-u
Uses an encoding given by user through <input_name>.enc file. In this file, a line started by a # character is a comment. A valid line contains one state name followed by its hexadecimal code.
-o
Uses the one hot encoding algorithm.
-r
Uses distinct random numbers for state encoding.
-C
Checks the transition's consistency.
-D
With this option syf doesn't optimize unused, i.e Don't Care, codes.
-E
Saves the encoding result in the <output_name>.enc. This file has the same syntax as <input_name>.enc file which is used by -u option.
-O
With this option syf places registers on the outputs.
-P
Implements a scan-path for the state registers, stack registers and possibly output registers. Please check fsm for information about scan-path descriptions.
-R
This option is only available for MOORE FSM. With this option, syf emulate s a ROM with micro-sequencer implementation : there is no combinatorial logic between the state registers and the FSM outputs. This can be mandatory for external timing constraints. See fsm and grog for more on ROM descriptions.
-S
With this option syf doesn't take into account the cost of the transitions to compute an encoding.
-V
Verbose mode on. Each step of the FSM synthesis is displayed on the standard output, along with some statistics.
EXAMPLE
Environment variables:
setenv MBK_WORK_LIB /alliance/tutorials/dlxm
syf is called as follow (the dlx_ctrl.fsm is already created in /alliance/tutorials/dlxm) :
syf -sE dlx_ctrl
Two files will be generated, a states encoding file dlx_ctrls.enc and a VHDL data flow file /alliance/tutorials/dlxm/dlx_ctrls.vbe
BUG REPORT
This tool is under development at the ASIM/LIP6/UPMC laboratory, cao-vlsi research team.
We need your feedbak to improve documentation and tools.
If you find bugs, please fill-in the form at
http://www-asim.lip6.fr/alliance/support/bug-report/
Thanks for doing this.
Index
- NAME
- ORIGIN
- SYNOPSIS
- DESCRIPTION
- ENVIRONMENT VARIABLES
- OPTIONS
- EXAMPLE
- BUG REPORT
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Time: 19:13:18 GMT, October 20, 1999