term 5: 2C+1S+2L (Ex.)
Overview:
The curricula of this course is according to
IEEE Computer Society/ACM Computing Curriculum -
Computer Engineering
The logic design area covers the digital building blocks, tools,
and techniques in digital design.
Emphasis is on a building-block approach.
This subject area comprises 2 semester hours.
Contents:
DIG1. Digital Computers and Information
1.1. Digital Computers
1.2. Number Systems
1.3. Arithmetic Operations
1.4. Alphanumeric Codes
DIG2. Combinatorial Logic Circuits
2.1. Binary Logic and Gates
2.2. Boolean Algebra
2.3. Logic Functions Representation
2.4. Synplifying a Boolean Function Using a Map
2.5. Logic Gates
2.6. Integrated Circuits
DIG3. Combinatorial Logic Design
3.1. Combinational Circuits
3.2. Design Topics
3.3. Analysis Procedure
3.4. Design Procedure
3.5. Decoders
3.6. Encoders
3.7. Multiplexers
3.8. Binary Adders
3.9. Binary Subtractors
3.10. Binary Ader-Subtractors
3.11. HDL Representation- VHDL/Verilog
DIG4. Sequential Logic Circuits
4.1. Sequential Circuit Definition
4.2. Latches
4.3. Flip-flops
4.4. Sequencial Circuits: Structure and Behaviour
4.5. Sequencial Circuits Representation
4.6. Sequencial Circuits Design
4.7. Particular State Encoding
4.8. Particular Automata
4.9. Sequencial Circuits Analysis
4.10. Registers
4.11. Counters
DIG5. Memory and Programmable Logic Devices
5.1. Read Only Memory
5.2. Random Access Memory
5.3. Programmable Logic Devices
DIG6. Digital Systems Design
Prerequisites:
Labs:
- Oscilloscope: Tool for measurement of digital signals.
- Laboratory Presentation: Computer, Programmable Power Supply,
Function Generator, Oscilloscope, Multimeter.
- Bipolar transistor: Switching Charateristics
- Integrated Logic Gates: Features and Voltage Transfer
Characteristics.
- Binary and Decimal Numbers. Building a "digital signal generator"
- Logic Gates.
- Multiplexer/Encoder.
- Combinatorial Hazard: Why Digital Systems do not always work?
- Finite State Machine.
- Timer: Clock Generator
- Modelling digital systems in Verilog/VHDL
- Modelling digital systems in Verilog/VHDL
- Pre-assesment preparation
- Assesment.
FPGA related Labs:
Digilent:
Xilinx
Spartan 3 Demo Board Manual.
Intronix:
Logic Analyzer Manual.
- LAB 1: Logic Gates.
(PDF)
(BIT)
- LAB 2: BCD to 7-segment Display Decoder.
(PDF)
(BIT)
- LAB 3: Adders.
(PDF)
(BIT)
- LAB 4: Registers.
(PDF)
(BIT)
- LAB 5: FSM.
(PDF)(BIT)
- LAB 6: Complex System.
(PDF)(BIT)
Bibliography:
- M. Morris Mano, C. R. Kime
Logic and Computer Design Fundamentals, 3/E.
ISBN: 0-13-140539-X, Prentice Hall, 2004,
Companion web site
- M. Morris Mano
Digital Design, 3/E.
ISBN: 0-13-062121-8, Prentice Hall, 2002
Companion web site
- G. Toacse, D. Nicula
Dispozitive, Circuite, Proiectare(I), Verilog HDL(II), Ed. Tehnica, 2005.
- G. Toacse, D. Nicula
Circuite Integrate Digitale
- Culegere de probleme
Universitatea Tehnica Cluj-Napoca, 1999.
- G. Stefan, I. Draghici
Circuite Integrate Digitale Ed. Didactica si Pedagogica, 1983.
- S. Maican Sisteme numerice cu circuite integrate Ed. Tehnica, 1980.
- G. Stefan Circuite Integrate Digitale Ed. Denix, 1992.
- D. Nicula, A. Craciun, F. Sandu
Circuite Integrate Digitale - Lucrari de Laborator
Reprografia Univ. Transilvania 1994. [II 29833]
- T.R. Blakeslee Proiectarea cu Circuite Logice MSI si LSI Standard
Ed. Tehnica, Bucuresti 1988.
- T. Muresan, s.a. Circuite Integrate Numerice - Aplicatii Ed. de Vest, 1996
- D. Nicula
Exam subjects 2003-2006